Bridging the Boundaries: Wafer, Panel and Beyond
October 13 - 15, 2020
DoubleTree by Hilton San Jose
San Jose, California, USA

Thank you for making IWLPC 2019 a success!

October 22 - 24, 2019
DoubleTree by Hilton San Jose
San Jose, California, USA

Each year, IWLPC sets the stage in the heart of Silicon Valley, providing attendees with the opportunity to network and attend presentations by industry experts. IWLPC is a highly regarded technical conference that covers leading edge advancements in wafer-level packaging.

With this year’s theme, "Advanced Packaging in the New Connected World," the program tracks comprised WLP, 3D, and Advanced Manufacturing and Test.

Pertinent statistics from this year’s show include:

  • 567 Total Attendees
  • 67 Exhibiting Companies
  • 20 Countries Represented
  • 45 Technical Papers



    View the 2019 Technical Program

    Interconnecting Wafer-Level Packaging, 3D Packaging, Advanced Manufacturing and Test, the International Wafer-Level Packaging Conference (IWLPC) is at the forefront of the packaging technology evolution.

    The Wafer-Level Packaging (WLP) track features sessions on Advanced Wafer Level Packaging & Materials, Reliability and Metrology, Fan Out Wafer level Packaging (FO-WLP), and Advanced Processing.

    The 3D Packaging track features sessions on Design, Characterization and Test, Wafer Bonding and Chip Stacking, and Processing for Fan-Out.

    The Advanced Manufacturing track features sessions on Process Materials and Equipment.

    View PDF program here!






    View full album here!




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    Organized by: SMTA and ChipScale Review



    Supported by:
    IEEE Electronic Packaging Society

    Supporting Media:
    MEPTEC