October 22 - 24, 2019
DoubleTree by Hilton San Jose
San Jose, California, USA

IWLPC 2019

October 22 - 24, 2019
DoubleTree by Hilton San Jose
San Jose, California, USA

SMTA and Chip Scale Review are pleased to announce the 16th Annual International Wafer-Level Packaging Conference and Tabletop Exhibition. IWLPC brings together some of the semiconductor industry's most respected authorities addressing all aspects of wafer-level, 3D, TSV, and MEMS device packaging and manufacturing.

Submit an abstract for IWLPC 2019!


Abstracts are currently being accepted if you would like to present at this conference. Technical papers and presentations are required and will be due September 9, 2019.

Click here to submit an abstract!




Thank you for making IWLPC 2018 a success!

October 23 - 25, 2018
DoubleTree by Hilton San Jose
San Jose, California, USA





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Organized by: SMTA and ChipScale Review



Supported by:
IEEE Electronic Packaging Society Panel Level Packaging Consortium

Supporting Media:
MEPTEC Open Sky Communications