Driving an Interconnected World
October 23 - 25, 2018
DoubleTree by Hilton San Jose
San Jose, California, USA
Registration Hours
Mon, Oct 22
Tue, Oct 23
Wed, Oct 24
Thu, Oct 25

Panel Discussions

Tuesday, October 18

Jan Vardaman The Role for Large-Area Panel Processing in the Quest for Low-Cost FOWLP
Moderator: Jan Vardaman, TechSearch International, Inc.

  • Bernard Adams, STATS ChipPAC Inc.
  • David Butler, SPTS Technologies
  • Choon Lee, Lam Research
  • Urmi Ray, Qualcomm Technologies, Inc.

  • Wednesday, October 19th

    Urmi Ray Chip-Package Interaction (CPI) Challenges and Solutions for WLP and FOWLP
    Moderator: Urmi Ray, Qualcomm

  • Rama Alapati, Amkor Technologies
  • John Hunt, ASE
  • Paul Mescher, Microsoft
  • Jan Vardaman, TechSearch International, Inc.
  • Luu Nguyen, Texas Instruments

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    Organized by: SMTA and ChipScale Review

    Supported by:
    IEEE Electronic Packaging Society Panel Level Packaging Consortium

    Supporting Media:
    MEPTEC Open Sky Communications